A semiconductor integrated circuit device (IC chip) used as a microprocessor of a computer or the like has recently become more and more rapid and multifunctional. Accordingly, the number of terminals tends to increase, and a pitch between terminals tends to be narrow. Generally, on the bottom face of the IC chip, a plurality of terminals are densely arranged in an array shape, and such a group of terminals are connected to a group of terminals on the motherboard in a flip-chip shape. However, since the pitch between terminals is significantly different between a group of terminals on the IC chip and a group of terminals on the motherboard, it is difficult to directly connect the IC chip onto the motherboard. Therefore, typically, a method is used in which a semiconductor package is manufactured by mounting the IC chip onto the IC chip mounting wiring substrate, and the semiconductor package is mounted onto the motherboard.
As the IC chip mounting wiring substrate for structuring such a kind of package, a multilayered wiring substrate obtained by forming build-up layers on the front and rear surfaces of the core substrate is used in practice. In the multilayered wiring substrate, for example, a resin substrate (such as a glass epoxy substrate) obtained by impregnating resin with reinforced fiber is used as a core substrate. In addition, build-up layers are formed by alternately stacking resin insulation layers and conductor layers on the front and rear surfaces of the core substrate utilizing the rigidity of the core substrate. That is, in the multilayered wiring substrate, the core substrate has a reinforcing function and is formed to have a significantly larger thickness in comparison with the build-up layer. In addition, the wiring (specifically, a through-hole conductor or the like) for facilitating interconnection between the build-up layers formed on the front and rear surfaces is formed through the core substrate.
On the other hand, as semiconductor integrated circuit devices have recently become faster and faster, the signal frequency used may become a high frequency band. In this case, the wiring passing through the core substrate contributes to a large inductance, which is related to the occurrence of high frequency signal transmission loss or circuit malfunction thus hindering high speed operation. In order to address such problems, it has been proposed to design a multilayered wiring substrate without the core substrate (e.g., refer to Patent Document 1). In this multilayered wiring substrate, the entire wiring length is shortened by omitting the core substrate which has a relatively large thickness. Therefore, it is possible to reduce high frequency signal transmission loss and operate the semiconductor integrated circuit devices at a high speed.
In the manufacturing method disclosed in Patent Document 1, the build-up layer is formed by arranging a metal foil on a single surface of a temporary substrate and alternately stacking a plurality of conductor layers and a plurality of resin insulation layers on the metal foil. Then, the metal foil is separated from the temporary substrate so that a structure having the build-up layer formed on the metal foil is obtained. Subsequently, the outermost layer surface of the build-up layer (the surface of the resin insulation layer or the surface of a plurality of connecting terminals) is exposed by removing the metal foil by etching so that the multilayered wiring substrate is manufactured.